Credits and Contact Hours

3 credits, 43 hours

Course Instructor Name

Prof. Imtiaz Ahmad and Dr. Faridah Ali

Textbook

Computer Organization and Design RISC-V Edition: The Hardware Software Interface,1st Edition, David Patterson and John Hennessy, Morgan Kaufmann. ISBN: 978-0-12-812275-4, 2018.

Catalog Description

Digital systems design principles and techniques including modeling and simulation with HDLs. Performance metrics and Amdahl\'s Law. CPU organization of computers. Instructing set architecture. Register transfer logic. Computer arithmetic: fast adders, multipliers, dividers, and floating-point arithmetic. Processor data path and control unit design. Pipelining, data/control hazards, data forwarding, branch prediction techniques and instruction level parallelism. An emphasis on hardware design methods, combined with increased discussion of performance and relevant software issues.

Prerequisite

CpE-363 and CpE-364

Specific Goals for the Course

Upon successful completion of this course, students will be able to:

Understand instruction set architecture and its major components.

Recognize the importance of instruction formats and addressing modes in computer design.

Construct a data path composed of registers, function unit and a register file. (Student outcome: 2)

Understand algorithms for performing common arithmetic operations (such as multiplication and division) and their hardware implementation for the design of ALU. (Student outcome: 2)

Translate fractional numbers to/from IEEE standard format and understand floating-point operations such as addition, subtraction, multiplication and division. (Student outcome: 2)

Select and apply the most appropriate performance metric when evaluating a computer system. (Student outcome: 2)

Understand and analyze the implementation of a pipelined machine. (Student outcome: 2)

Identify and propose solutions to structural, data and control hazards in a given architecture. (Student outcome: 2)

Identify and propose branch prediction techniques in a given architecture. (Student outcome: 2)

Compare alternative architectural implementations (such as VLIW, Superscalar processors). (Student outcome: 2)

Topics to Be Covered

Computer performance metrics and Amdahl's law.

Digital systems design principles and techniques.

The instruction set architecture, instruction formats and addressing modes.

Computer arithmetic (Fast adders, multiplication and division algorithms, floating-point numbers).

Processor data path design and control unit design.

Introduction to pipelining and pipelined processor design.

Pipelining hazards: structural, data and control and their solution techniques (data forwarding, register renaming and branch predictors).

Instruction Level Parallelism (ILP) techniques (VLIW and Superscalar processors).