Credits and Contact Hours

3 credits, 43 hours

Course Instructor Name

Prof. Imtiaz Ahmad, Dr. Mohammad Al-Failakawi, Dr. Sa'ed Abed

Textbook

Computer Organization and Design RISC-V Edition: The Hardware Software Interface,1st Edition, David Patterson and John Hennessy, Morgan Kaufmann. ISBN: 978-0-12-812275-4, 2018.

David Kirk and Wen-mei Hwu, Programming Massively Parallel Processors: A Hands-on Approach, 3rd Edition, ISBN: 9780128119860, Morgan Kaufmann, 2017.

Catalog Description

This course provides students with a solid understanding of fundamental architectural techniques used in today\'s high-performance processors and systems. Course topics include memory hierarchies (caches and virtual memory), cache coherence, data-level parallelism, parallel architectures classification, vector processing, shared memory multiprocessors, multithreading, multicore, multiprocessors network topologies, GPUs architectures and CUDA programming for GPUs. An emphasis will be both on hardware and software issues specially related to parallel programming.

Prerequisite

CpE-368

Co-requisite

CpE-469

Specific Goals for the Course

Upon successful completion of this course, students will be able to:

Identify the main types of memory technology. (Student outcome: 2)

Explain the use of memory hierarchy to reduce the effective memory latency. (Student outcome: 2)

Design and implement caches and TLBs. (Student outcome:2)

Compare and contrast different cache designs. (Student outcome: 2)

Describe data access from different storage systems. (Student outcome: 2)

Classify different computer systems paradigms (Vector, SIMD, multicore and GPU) and explain their usefulness and applicability. (Student outcome: 2)

Compare and contrast different interconnection topologies for data centers. (Student outcome: 2)

Evaluate the performance of GPU architecture by writing parallel program for an application. (Student outcome: 2)

Topics to Be Covered

Overview of computer architecture.

Memory hierarchy, technology and memory performance.

Cache design and virtual memory.

Data-level parallelism in vector, SIMD, multicore, clusters and cloud computing.

Memory synchronization and coherence protocols.

Data centers and interconnection topologies.

GPU Parallel architectures and CUDA programming.