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CPE
474
ASIC Design
Principles and practices involved in the design, implementation, testing, and evaluation of standard-cell ASIC chips using automated state-of-the-art CAD tools. Topics include hardware description languages, CMOS logic, Finite state machine theory and implementation, and interconnect fundamentals, chip design methodologies, automated cell-based design, CAD algorithms, details of accurately modeling ASIC delay, energy, and area, robustness issues, testing, verification, and debugging, power distribution and clocking, packaging and I/O.
Prerequisites:
0610233,0612368
0612474
(3-0-3)

Credits and Contact Hours

3 credits, 43 hours

Course Instructor Name

Dr. Mahmoud Bennaser

Textbook

  • Digital Integrated Circuits, Jan M. Rabaey, Anantha P. Chandrakasan, Borivoje Nikolic, Pearson Education, Prentice Hall, 2nd Edition, 2003, ISBN 0130909963, ISBN-13: 978-0130909961.
  • CMOS VLSI Design: A Circuits and Systems Perspective, 4th Edition, Neil Weste, David Harris, Addison Wesley, 2010, ISBN: 0321547748.
  • Design of High Performance Microprocessor Circuits, A. Chandrakasan, W. Bowhill, F. Fox, IEEE Press, 2000, ISBN 078036001.

Catalog Description

Principles and practices involved in the design, implementation, testing, and evaluation of standard-cell ASIC chips using automated state-of-the-art CAD tools. Topics include hardware description languages; CMOS logic, state, and interconnect fundamentals; chip design methodologies; automated cell-based design; CAD algorithms; details of accurately modeling ASIC delay, energy, and area; robustness issues; testing, verification, and debugging; power distribution and clocking; packaging and I/O

Prerequisite

EE-233, CpE-368

Specific Goals for the Course

Upon successful completion of this course, students will be able to:

  • Understand how CAD models make the link between technology and digital design. (Student outcomes: 1, 2)
  • Select adequate ASIC technologies based on the given specifications. (Student outcomes: 1, 2)
  • Design digital ASIC circuits using standardized industrial tools. (Student outcomes: 1, 2)
  • Become familiar with good design methodology and CAD tools capabilities and limitations. (Student outcomes: 1, 2, 5)
  • Generate and analyze the obtained results in ASIC design. (Student outcomes: 1, 2)
  • Understand current ASIC design issues such as design for test and low power designs. (Student outcomes: 1, 2, 6)
  • Simulate different simulation models of ASIC design. (Student outcomes: 1, 2)

Topics to Be Covered

  • Design Tools and Flows
  • VLSI Design: History, Trends, Principles, Metrics.
  • CMOS Process and Layout.
  • CMOS Devices: SPICE and deep sub-micron issues.
  • CMOS Inverter: speed, power and scaling.
  • Static & Dynamic CMOS Gates
  • Design verification.
  • Simulation and timing analysis.
  • Power Estimation and Optimization.
  • Memory Design.
  • Advanced Topics.