CPE
477
Hardware Description Language-Based Design
This course is a study of techniques and processes for the design of digital systems. The focus is on the design of system modules derived from functional and interface specifications. A progression of designs, culminating in the design of a digital central processing unit and its peripheral units, will be used to illustrate both design and test techniques and procedures. This course will use a modern high level Hardware Design Language (HDL) as the main design tool. While implementation at the logic component (gate) level will be considered, the focus will be on system-level design and higher level behavioral modeling.
Prerequisites:
0612207,0612368
0612477
(3-0-3)
Credits and Contact Hours
3 credits, 43 hours
Course Instructor Name
Dr. Abbas Fairouz
Textbook
- Verilog HDL: A Guide to Digital Design and Synthesis, Samir Palnitkar, 2nd Edition
- Michael D. Ciletti, Advanced Digital Design with the Verilog HDL
Catalog Description
This course is a study of techniques and processes for the design of digital systems. The focus is on the design of system modules derived from functional and interface specifications. A progression of designs, culminating in the design of a digital central processing unit and its peripheral units, will be used to illustrate both design and test techniques and procedures. This course will use a modern high level Hardware Design Language (HDL) as the main design tool. While implementation at the logic component (gate) level will be considered, the focus will be on system-level design and higher level behavioral modeling.
Prerequisite
CpE-207, CpE-368
Specific Goals for the Course
Upon successful completion of this course, students will be able to:
- Understand the role of HDL in digital design process. (Student outcomes: 1)
- Develop behavioral, register transfer, and structural/gate level HDL models of digital systems. (Student outcomes: 1, 2)
- Verify/validate HDL-based digital system designs by using simulations through modern EDA software. (Student outcomes: 1, 2, 6)
- Synthesize behavioral, register transfer, and structural/gate level HDL models of digital systems to various technologies. (Student outcomes: 1, 2)
- Use the state of the art Electronic Design Automation (EDA) tools such as Synopsis or Altera Quartus in modeling and simulation of digital systems. (Student outcomes: 1, 2)
- Express digital design at multilevel of abstraction in Verilog HDL. (Student outcomes: 1, 2)
- Use CAD tool for visualization of logic simulation. (Student outcomes: 2, 6)
- Design combination circuits of increasing complexity according to a stated functional behavior. (Student outcomes: 1, 2)
- Integrate previously designed components into a large-scale system to meet the specified requirements. (Student outcomes: 1, 2)
- Express digital design at System-level languages, such as SystemC.
Topics to Be Covered
- Digital design methodology.
- Evolution of hardware description languages (HDLs).
- Hierarchical modeling concepts.
- Data types and operators.
- Modules and ports: declaration and connections.
- Combinational and sequential circuit design.
- Structural, behavioral and RTL modeling of digital systems.
- Finite state machines minimization and assignments.
- Design implementation technologies.
- Design and synthesis of digital logic.
- Algorithms and architectures for digital processors.
- System-level design languages.